Nandflash 驱动移植

xiaoxiao2021-02-27 398

前段时间，研究了一下4G的Nandflash驱动。手头上只有飞凌6410BSP自带的Nandflash驱动，该驱动不支持K9GAG08U0D（2G）和K9LBG08U0D（4G）的Nandflash。所以就要先把这个Nandflash驱动搞成支持K9GAG08U0D（2G）的。

接下来要弄的就是支持K9LBG08U0D（4G）的Nandflash。由于TE6410板子用的是K9GAG08U0D（2G）的Nandflash，所以先移植到支持这个Nandflash的，再进一步修改成支持K9LBG08U0D的。

移植之前，先让我们来对比下K9GAG08U0D（2G）和K9LBG08U0D（4G）两个Nandflash：

K9GAG08U0D（2G）：

• Organization - Memory Cell Array : (2G + 109M) x 8bit - Data Register : (4K + 218) x 8bit • Automatic Program and Erase - Page Program : (4K + 218)Byte - Block Erase : (512K + 27.25K)Byte • Page Read Operation - Page Size : (4K + 218)Byte - Random Read : 60 µ s(Max.) - Serial Access : 30ns(Min.) • Memory Cell : 2bit / Memory Cell

K9LBG08U0D（4G）：

Organization - Memory Cell Array : (2G + 109M) x 8bit（文档这里是写的2G，也不知道是不是三星那个写文档的人搞错了，明明是4G，怎么写的是2G） - Data Register : (4K + 218) x 8bit • Automatic Program and Erase - Page Program : (4K + 218)Byte - Block Erase : (512K + 27.25K)Byte • Page Read Operation - Page Size : (4K + 218)Byte - Random Read : 60 µ s(Max.) - Serial Access : 30ns(Min.) *K9MDG08U5D: 50ns(Min.) • Memory Cell : 2bit / Memory Cell

两个Nandflash都是4K 页 218备用区的，这样就更好办了。而且这两个都可以直接使用8bit的ECC，刚好6410最大就能支持到8bit的ECC校验。

咱们再来看一下这个8BIT 的ECC校验流程：

现在暂时到这里，下一篇将介绍6410中的NFCON控制寄存器部分。

这里将会介绍一下S3C6410CPU中的NFCON，Nandflash控制寄存器

8.1 OVERVIEW Recently NOR flash memory price has increased and pr ice for SDRAM and a NAND flash memory is moderatly placed. The 6410 is equipped with an internal SRAM buffer called ‘Steppingstone’. Generally, the boot code will copy NAND flash content to SDRAM. Using hardware ECC, the NAND flash data validity will be checked. After the NAND flash content is copied to SDRAM, main program will be executed on SDRAM. To use NAND Flash, 'XSELNAND' pin must be connected to High Level. 8.2 FEATURES NAND flash controller features include: 1. NAND Flash memory I/F: Support 512Bytes and 2KB Page . 2. Software mode: User can directly access NAND flash memory. for example this feature can be used in read/erase/program NAND flash memory. 3. Interface: 8-bit NAND flash memory interface bus. 4. Hardware ECC generation, detection and indication (Software correction).

硬件产生ECC，软件矫正 5. Support both SLC and MLC NAND flash memory : 1-bit ECC, 4-bit and 8-bit ECC for NAND flash. (Recommend: 1bit ECC for SLC, 4bit and 8bit ECC for MLC NAND Flash)

同时支持SLC和MLC的Nandflash：1bit ECC用于SLC Nandflash， 4bit和8bit ECC用于MLC Nandflash 6. SFR I/F: Support Byte/half word/word access to Data and ECC Data register, and Word access to other registers 7. SteppingStone I/F: Support Byte/half word/word access. 8. The Steppingstone 8-KB internal SRAM buffer can be used for another purpose .

其他的这里就不废话了，大家看回文档吧。

其中要注意的地方：

Both 4bit and 8bit ECC modules can be used for only 512 bytes ECC parity code generation.

4bit和8bit的ECC模块同时能够用于产生每读写512字节数据对应的ECC校验值。

4 bit and 8bit ECC modules generate the parity codes for each 512 byte. However, 1 bit ECC modules generate parity code per byte lane separately.

4bit ECC modules generate max 7byte parity codes and 8 bit ECC modules generate 13byte parity codes at each 512/24 bytes.

在每读写512或24字节的数据时，4bit的ECC模块产生最多7个字节的ECC校验码，而8bit的ECC模块产生最多13字节的校验码

下面直接来看8bit ECC的编解码：

8.8.5 8-BIT ECC PROGRAMMING GUIDE (ENCODING) 1. To use 8-bit ECC in software mode, set the Ms gLength to 0(512-byte message length) and set the ECCType to “01”(enable 8-bit ECC). ECC module generates ECC parit y code for 512-byte write data. In order to start the ECC module, you have to write ‘1’ on the Init MECC (NFCONT[5]) bit after cleaning the MainECCLock (NFCONT[7]) bit to ‘0’ (Unlock). MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not. Note. In 8bit ECC, MainECCLock should be cleared before initiating InitMECC. 2. Whenever data is written, the 8bit ECC module generates ECC parity code internally. 3. After you finish writing 512-byte data (not include spare area data), the parity codes are automatically updated to NF8MECC0, NFMECC1, NF8MECC2, NF8MECC3 regi ster. You have to check encoding done at NFSTAT register. And set the MainECCLock bit to ‘1’(lock). If you use 512-byte page size NAND flash memory, you can program these values directly to spare area. However, if you use NAND flash memory more than 512- byte page, you can’t program immediately. In this case, you have to copy these par ity codes to other memory like DRAM. After writing all main data, you c an write the copied ECC values to spare area. The parity codes have self-correctable information include parity code itself. 4. To generate spare area ECC parity code, set the MsgLength to 1(24-byte message length), and set the ECCType to “01”(enable 8bit ECC). 8bit ECC module generates the ECC parity code for 24-byte data. In order to initiating the module, you have to write ‘1 ’ on the InitMECC (NFCONT[5]) bit after clearing the MainECCLock (NFCONT[7]) bit to ‘0’(Unlock). MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.

Note. In 8bit ECC, MainECCLock should be cleared before initiating InitMECC. 5. Whenever data is written, the 8bit ECC module generates ECC parity code internally. 6. When you finish writing 24-byte meta or extra data, the parity codes are automatically updated to NF8MECC0, NFMECC1, NF8MECC2, NF8MECC3 register. you have to check encoding done at NFSTAT register. And set the MainECCLock bit to ‘1’(lock) . You can program these parity codes to spare area. The parity codes have self-correctable information include parity code itself.

部分译文：（仅供参考）

8bit ECC编码： 1、要用8bit的ECC，需要设置MsgLength 为0(512-byte message length) 和设置ECCTypet为 “01”(enable 8bit ECC)。8bit ECC模块会在读取512字节主数据之后产生对应的ECC校验码。要8bit的ECC模块开始工作，你必须在设置InitMECC (NFCONT[5])为1之前把MainECCLock (NFCONT[7]) 清0进行解锁。 MainECCLock (NFCONT[7]) 位控制着是否要产生对应的ECC校验码。注意：在8bit ECC中，MainECCLock必须先清0，然后在对InitMECC置1 2、数据一旦写完，MLC的ECC模块就会产生对应的ECC校验码。 3、当你完成了512字节的主数据的写操作（不包括备用区数据），对应的ECC校验码将会自动的更新到NFM8ECC0, NFM8ECC1, NFM8ECC2, NFM8ECC3寄存器中。你必须在NFSTAT寄存器中检测编码是否完成（在这里应该是NFSTAT[7]，不知道为什么文档中的NFSTAT寄存器中的7bit为保留位，而三星的MLC bsp中却有用到这个位，这个情况大家可以推敲下）。同时，设置MainECCLock 为1加锁。如果你用的是512字节页大小的Nandflash存储，你可以直接把这些产生的ECC校验码写到备用区中。如果你使用的Nandflash存储超过了512字节的页大小，你不能够直接把产生的ECC校验码写到备用区中。在这种情况，你必须把每写512字节主数据产生的ECC校验码拷贝到其他存储器中，如DRAM。当写完所有的主数据（即一页大小的主数据），你可以把拷贝到其他存储器的ECC校验码写到备用区中。这个校验码带有自身矫正的信息和校验码值。剩下的ECC读写基本雷同，这里就不翻译了。

8.8.6 8-BIT ECC PROGRAMMING GUIDE (DECODING) 1. To use 8bit ECC in software mode, set the MsgLength to 0(512-byte message length) and set the ECCType to “01”(enable 8bit ECC). 8bit ECC module generates E CC parity code for 512-byte read data. In order to initiating 8bit ECC module, you have to write ‘1’ on the InitMECC (NFCONT[5]) bit after clearing the MainECCLock (NFCONT[7]) bit to ‘0’(Unlock). MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not. Note. In 8bit ECC, MainECCLock should be cleared before InitMECC 2. Whenever data is read, the MLC ECC m odule generates ECC parity code internally. 3. After you complete reading 512-byte data (not including spare area data), you must set the MainECCLock (NFCONT[7]) bit to ‘1’(Lock) after reading parity codes. 8bit ECC module needs parity codes to detect whether error bits exists or not. So you have to read the ECC parity code of 512-byte main data right after reading the 512-byte data. Once the ECC parity code is read, 8bit ECC engine starts searching any error internally. 8bit ECC error searching engine needs mini mum 372 cycles to find any error. And set the MainECCLock bit to ‘1’(lock). ECCDecDone(NFSTAT[6]) can be used to check whether ECC decoding is completed or not. 4. When ECCDecDone (NFSTAT[6]) is set (‘1’), NF8ECCERR0 indicates whether error bit exists or not. If any error exists, you can fix it by referencing NF8ECCERR0/1/2 and NFMLC8BITPT0/1 register. 5. If you have more main data to read, continue doing from step 1. 6. For meta data error check, set the MsgLength to 1(24-byte message length) and set the ECCType to “01”(enable 8bit ECC). ECC module generates the ECC parity code for 24-byte data. In order to initiating the 8bit ECC module, you have to write ‘1’ on the InitMECC (NFCONT[5]) bit after clearing the MainECCLock (NFCONT[7]) bit to ‘0’(Unlock). MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not. Note. In 8bit ECC, MainECCLock should be cleared before InitMECC 7. Whenever data is read, the 8bit ECC module generates ECC parity code internally.

8. After you complete reading 24-byte, you must set the MainECCLock (NFCONT[7]) bit to ‘1’(Lock) after read ing the parity code for 24-byte data. MLC ECC module needs parity codes to detect w hether error bits exists or not. So you have to read ECC parity codes right after reading 24-byte data. Once ECC parity code is read, 8bit ECC engine starts searching any error internally. 8bit ECC error searching engine needs minimum 372 cycles to find any error. And set the MainECCLock bit to ‘1’(lock). ECCDecDone(NFSTAT[6]) can be used to check whether ECC decoding is completed or not. 9. When ECCDecDone (NFSTAT[6]) is set (‘1’), NF8ECCERR0 indicates whether error bit exist or not. If any

error exists, you can fix it by referencing NF8ECCERR0/1/2 and NF8MLCBITPT register.

部分译文：（仅供参考）

8bit ECC译码： 1、要用8bit的ECC，需要设置MsgLength 为0(512-byte message length) 和设置ECCTypet为 “01”(enable 8bit ECC)。8bit ECC模块会在读取512字节主数据之后产生对应的ECC校验码。要8bit的ECC模块开始工作，你必须在设置InitMECC (NFCONT[5])为1之前把MainECCLock (NFCONT[7]) 清0进行解锁。 MainECCLock (NFCONT[7]) 位控制着是否要产生对应的ECC校验码。注意：在8bit ECC中，MainECCLock必须先清0，然后在对InitMECC置1 2、数据一旦被读取，MLC的ECC模块就会产生对应的ECC校验码。 3、在完成读取512字节的主数据后（不包括备用区数据），读取对应的主数据区的校验码，然后必须设置MainECCLock(NFCONT[7])位为1，锁住ECC的产生。8bit 的ECC模块需要这个校验码来确定是否有错误位的存在。所以你必须在读取完512字节的主数据之后，把对应的主数据区的ECC校验码读取出来。一旦主数据区对应的ECC校验码被读，8bit的ECC引擎就会开始查找错误。8bit的ECC错误查找引擎需要最少372个周期去查找存在的错误。同时设置MainECCLock位为1，加锁。ECCDecDone(NFSTAT[6]) 可以用于检测ECC译码是否完成。 4、当ECCDecDone (NFSTAT[6])设置为1，NF8ECCERR0会指出是否有错误位的存在。如果有错误存在，你可以用NF8ECCERR0/1/2和NFMLC8BITPT0/1去修正相应的错误。 5、如果你有更多的主数据要读取，则从第一步开始重复操作。

PS: 原文中有些寄存器是写错的，大家在看的时候要注意。

吐槽一下，三星这个文档实在是简陋的可以，而且错误的地方还很多，想不BS一下都不成。

在这里有个地方要注意的是：

在写数据到Nandflash的时候，每写512字节就会产生一次ECC，我们这里用的是4K页，大于512字节，所以必须把产生的ECC校验值保存起来，等到一页（4k）写完，再把这些ECC写入到备用区中。

而在读取数据的时候，却是每读取512字节的主数据，就会产生一次ECC，这时就要进行ECC校验、矫正了。和写的时候不大一样，需要注意这一点。

寄存器部分：

红色框住是主要使用的寄存器和8bit ECC所用到的寄存器。

主要用到的寄存器就到这了，下一篇将开始代码部分。

在飞凌提供的BSP中，Nandflash采用的是FMD+PDD的结构，PDD主要是应对上层的接口，这里我们不需要修改，直接修改FMD就好。（至于在网上看到很多人说这个结构理论上不支持MLC的Nandflash，这个暂且不说）.

FMD部分的驱动源码在 C:\WINCE600\PLATFORM\SMDK6410\src\common\nandflash\FMD\ 这个目录下边。

FMD的目录结构：

nand.s

cfnand.h

fmd_LB.h（实际并没用到）

fmd_SB.h（实际并没用到）

nand.h

fmd.cpp

sources

makefile

先看sources文件：

!if 0 Copyright (c) Microsoft Corporation. All rights reserved. !endif !if 0 Use of this sample source code is subject to the terms of the Microsoft license agreement under which you licensed this sample source code. If you did not accept the terms of the license agreement, you are not authorized to use this sample source code. For the terms of the license, please see the license agreement between you and Microsoft or, if applicable, see the LICENSE.RTF on your install media or the root of your tools installation. THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES. !endif !IF 0 Module Name: sources. Abstract: This file specifies the target component being built and the list of sources files needed to build that component. Also specifies optional compiler switches and libraries that are unique for the component being built. !ENDIF TARGETNAME=nandflash_lib11 TARGETTYPE=LIBRARY RELEASETYPE=PLATFORM SYNCHRONIZE_BLOCK=1 WINCEOEM=1 WINCECPU=1 NOMIPS16CODE=1 ADEFINES=-pd "_TGTCPU SETS \"$(_TGTCPU)\"" $(ADEFINES) LDEFINES=-subsystem:native /DEBUG /DEBUGTYPE:CV /FIXED:NO INCLUDES=$(INCLUDES) SOURCES=\ fmd.cpp ARM_SOURCES=\ nand.s 这个代码是飞凌提供的，且看这一句 TARGETNAME=nandflash_lib11 ，经查实，FMD+PDD使用的是FMD产生的nandflash_lib.lib库文件，而不是nandflash_lib11.lib文件，这也说明飞凌在这方面留了一手，并没有直接提供可用的源码，而是给了一个lib库给我们。

在这里，我们需要把 TARGETNAME=nandflash_lib11 修改为 TARGETNAME=nandflash_lib

cfnand.h文件：

/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR PURPOSE. Copyright (c) 2001 Microsoft Corporation Module Name: S3C6410.H Abstract: FLASH Media Driver Interface Samsung S3C6410 CPU with NAND Flash controller. Environment: As noted, this media driver works on behalf of the FAL to directly access the underlying FLASH hardware. Consquently, this module needs to be linked with FLASHFAL.LIB to produce the device driver named FLASHDRV.DLL. -----------------------------------------------------------------------------*/ #ifndef _S3C6410_CFNAND_H #define _S3C6410_CFNAND_H #include "FMD_LB.h" #include "FMD_SB.h" #include "nand.h" #define BW_X08 (0) #define BW_X16 (1) #define BW_X32 (2) #define MAX_SECTORS_PER_PAGE (8) /*****************************************************************************/ /* S3C6410 Nand Flash Internal Data Structure Definition */ /*****************************************************************************/ typedef struct { UINT16 nMID; /* Manufacturer ID */ UINT16 nDID; /* Device ID */ UINT16 nNumOfBlks; /* Number of Blocks */ UINT16 nPgsPerBlk; /* Number of Pages per block */ UINT16 nSctsPerPg; /* Number of Sectors per page */ UINT16 nNumOfPlanes; /* Number of Planes */ UINT16 nBlksInRsv; /* The Number of Blocks in Reservior for Bad Blocks */ UINT8 nBadPos; /* BadBlock Information Poisition*/ UINT8 nLsnPos; /* LSN Position */ UINT8 nECCPos; /* ECC Policy : HW_ECC, SW_ECC */ UINT16 nBWidth; /* Nand Organization X8 or X16 */ UINT16 nTrTime; /* Typical Read Op Time */ UINT16 nTwTime; /* Typical Write Op Time */ UINT16 nTeTime; /* Typical Erase Op Time */ UINT16 nTfTime; /* Typical Transfer Op Time */ } FlashDevSpec; static FlashDevSpec astNandSpec[] = { /*************************************************************************/ /* nMID, nDID, */ /* nNumOfBlks */ /* nPgsPerBlk */ /* nSctsPerPg */ /* nNumOfPlanes */ /* nBlksInRsv */ /* nBadPos */ /* nLsnPos */ /* nECCPos */ /* nBWidth */ /* nTrTime */ /* nTwTime */ /* nTeTime */ /* nTfTime*/ /*************************************************************************/ /* 8Gbit DDP NAND Flash */ //{ 0xEC, 0xD3, 8192, 64, 4, 2,160, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0xD3, 4096, 128, 4, 2,160, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, /* 16Gbit DDP NAND Flash */ { 0xEC, 0xD5, 4096, 128, 8, 2,160, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, // 8192 gjl /* 4Gbit DDP NAND Flash */ { 0xEC, 0xAC, 4096, 64, 4, 2, 80, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0xDC, 4096, 64, 4, 2, 80, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0xBC, 4096, 64, 4, 2, 80, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0xCC, 4096, 64, 4, 2, 80, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, /* 2Gbit NAND Flash */ { 0xEC, 0xAA, 2048, 64, 4, 1, 40, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0xDA, 2048, 64, 4, 1, 40, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0xBA, 2048, 64, 4, 1, 40, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0xCA, 2048, 64, 4, 1, 40, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, /* 2Gbit DDP NAND Flash */ { 0xEC, 0xDA, 2048, 64, 4, 2, 40, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0xAA, 2048, 64, 4, 2, 40, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0xBA, 2048, 64, 4, 2, 40, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0xCA, 2048, 64, 4, 2, 40, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, /*1Gbit NAND Flash */ { 0xEC, 0xA1, 1024, 64, 4, 1, 20, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0xF1, 1024, 64, 4, 1, 20, 0, 2, 8, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0xB1, 1024, 64, 4, 1, 20, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0xC1, 1024, 64, 4, 1, 20, 0, 2, 8, BW_X16, 50, 350, 2000, 50}, /* 1Gbit NAND Flash */ { 0xEC, 0x79, 8192, 32, 1, 4,120, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0x78, 8192, 32, 1, 4,120, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0x74, 8192, 32, 1, 4,120,11, 0, 6, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0x72, 8192, 32, 1, 4,120,11, 0, 6, BW_X16, 50, 350, 2000, 50}, /* 512Mbit NAND Flash */ { 0xEC, 0x76, 4096, 32, 1, 4, 70, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0x36, 4096, 32, 1, 4, 70, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, /* 512Mbit XP Card */ { 0x98, 0x76, 4096, 32, 1, 4, 70, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, { 0x98, 0x79, 4096, 32, 1, 4, 70, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0x56, 4096, 32, 1, 4, 70,11, 0, 6, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0x46, 4096, 32, 1, 4, 70,11, 0, 6, BW_X16, 50, 350, 2000, 50}, /* 256Mbit NAND Flash */ { 0xEC, 0x75, 2048, 32, 1, 1, 35, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0x35, 2048, 32, 1, 1, 35, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0x55, 2048, 32, 1, 1, 35,11, 0, 6, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0x45, 2048, 32, 1, 1, 35,11, 0, 6, BW_X16, 50, 350, 2000, 50}, /* 128Mbit NAND Flash */ { 0xEC, 0x73, 1024, 32, 1, 1, 20, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, { 0xEC, 0x33, 1024, 32, 1, 1, 20, 5, 0, 6, BW_X08, 50, 350, 2000, 50}, //{ 0xEC, 0x53, 1024, 32, 1, 1, 20,11, 0, 6, BW_X16, 50, 350, 2000, 50}, //{ 0xEC, 0x43, 1024, 32, 1, 1, 20,11, 0, 6, BW_X16, 50, 350, 2000, 50}, { 0x00, 0x00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }; #endif _S3C6410_CFNAND_H 且看

/* 16Gbit DDP NAND Flash */ 0xEC, 0xD5, 4096, 128, 8, 2,160, 0, 2, 8, BW_X08, 50, 350, 2000, 50} 这里就是使用的2G（16/8 bit=2byte） Nandflash K9GAG08U0D的一些参数配置，其中 0xEC, 0xD5表示的是Nandflash的ID号，总共有4096个block，每个block有128个page，每个page有8个sector

要支持4G（K9LBG08U0D）的话，则加上下面的配置：

/* 32Gbit DDP NAND Flash */ { 0xEC, 0xD7, 8192, 128, 8, 1,160, 0, 2, 8, BW_X08, 50, 350, 2000, 50},

在看nand.h文件之前，我们先来看一下fmd.cpp中引用的#include "s3c6410_nand.h"头文件：（该文件在C:\WINCE600\PLATFORM\COMMON\SRC\SOC\S3C6410_SEC_V1\OAL\INC\s3c6410_nand.h）

// // Copyright (c) Microsoft Corporation. All rights reserved. // // // Use of this source code is subject to the terms of the Microsoft end-user // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. // If you did not accept the terms of the EULA, you are not authorized to use // this source code. For a copy of the EULA, please see the LICENSE.RTF on your // install media. // //------------------------------------------------------------------------------ // // Header: s3c6410_nand.h // // Defines the NAND controller CPU register layout and definitions. // #ifndef __S3C6410_NAND_H #define __S3C6410_NAND_H #if __cplusplus extern "C" { #endif //------------------------------------------------------------------------------ // Type: S3C6410_NAND_REG // // NAND Flash controller register layout. This register bank is located // by the constant CPU_BASE_REG_XX_NAND in the configuration file // cpu_base_reg_cfg.h. // typedef struct { UINT32 NFCONF; //0x00 // configuration reg UINT32 NFCONT; //0x04 UINT8 NFCMD; //0x08 // command set reg UINT8 d0[3]; UINT8 NFADDR; //0x0C // address set reg UINT8 d1[3]; UINT8 NFDATA; //0x10 // data reg UINT8 d2[3]; UINT32 NFMECCD0; //0x14 UINT32 NFMECCD1; //0x18 UINT32 NFSECCD; //0x1C UINT32 NFSBLK; //0x20 UINT32 NFEBLK; //0x24 // error correction code 2 UINT32 NFSTAT; //0x28 // operation status reg UINT32 NFECCERR0; //0x2C UINT32 NFECCERR1; //0x30 UINT32 NFMECC0; //0x34 // error correction code 0 UINT32 NFMECC1; //0x38 // error correction code 1 UINT32 NFSECC; //0x3C UINT32 NFMLCBITPT; //0x40 } S3C6410_NAND_REG, *PS3C6410_NAND_REG; #if __cplusplus } #endif #endif 注意到了麽？这个跟文档中的寄存器少了8bit ECC寄存器部分。

晕菜了吧，飞凌的这个2G 256M的BSP的Nandflash源码既然是这个样子，为什么还在那里号称8bit的ECC，还说开放源码。

靠别人都行的话，母猪都会上树啦！咱还是自己搞吧！

在上面UINT32 NFMLCBITPT; //0x40 的后面添加以下代码：

UINT32 NF8ECCERR0; //0x44-- 8位ECC错误状态0寄存器 UINT32 NF8ECCERR1; //0x48-- 8位ECC错误状态1寄存器 UINT32 NF8ECCERR2; //0x4c-- 8位ECC错误状态2寄存器 UINT32 NFM8ECC0; //0x50-- 生成8位ECC状态0寄存器 UINT32 NFM8ECC1; //0x54-- 生成8位ECC状态1寄存器 UINT32 NFM8ECC2; //0x58-- 生成8位ECC状态2寄存器 UINT32 NFM8ECC3; //0x5c-- 生成8位ECC状态3寄存器 UINT32 NFMLC8BITPT0; //0x60-- 8位ECC错误位模式寄存器0 UINT32 NFMLC8BITPT1; //0x64-- 8位ECC错误位模式寄存器1

nand.h文件：

// // Copyright (c) Microsoft Corporation. All rights reserved. // // // Use of this sample source code is subject to the terms of the Microsoft // license agreement under which you licensed this sample source code. If // you did not accept the terms of the license agreement, you are not // authorized to use this sample source code. For the terms of the license, // please see the license agreement between you and Microsoft or, if applicable, // see the LICENSE.RTF on your install media or the root of your tools installation. // THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES. // #ifndef __NAND_H__ #define __NAND_H__ //----------------------------------------------------------------------------- typedef struct { UINT16 nNumOfBlks; UINT16 nPagesPerBlk; UINT16 nSctsPerPage; } NANDDeviceInfo; NANDDeviceInfo stDeviceInfo; #ifdef __cplusplus extern "C" { #endif NANDDeviceInfo GetNandInfo(void); #ifdef __cplusplus } #endif #define NUM_OF_BLOCKS (stDeviceInfo.nNumOfBlks) #define PAGES_PER_BLOCK (stDeviceInfo.nPagesPerBlk) #define SECTORS_PER_PAGE (stDeviceInfo.nSctsPerPage) #undef SECTOR_SIZE #define SECTOR_SIZE (512) #define NAND_SECTOR_SIZE (SECTOR_SIZE*SECTORS_PER_PAGE) #define NAND_PAGE_SIZE (SECTOR_SIZE*SECTORS_PER_PAGE) //< Physical Page Size #define IS_LB ((SECTORS_PER_PAGE == 4)||(SECTORS_PER_PAGE == 8)) //----------------------------------------------------------------------------- #define USE_NFCE (0) #define USE_GPIO (0) #define TACLS (NAND_TACLS) #define TWRPH0 (NAND_TWRPH0) #define TWRPH1 (NAND_TWRPH1) #define ECCType (23) //----------------------------------------------------------------------------- #define CMD_READID (0x90) // ReadID #define CMD_READ (0x00) // Read #define CMD_READ2 (0x50) // Read2 #define CMD_READ3 (0x30) // Read3 #define CMD_RESET (0xff) // Reset #define CMD_ERASE (0x60) // Erase phase 1 #define CMD_ERASE2 (0xd0) // Erase phase 2 #define CMD_WRITE (0x80) // Write phase 1 #define CMD_WRITE2 (0x10) // Write phase 2 #define CMD_STATUS (0x70) // STATUS #define CMD_RDI (0x85) // Random Data Input #define CMD_RDO (0x05) // Random Data Output #define CMD_RDO2 (0xE0) // Random Data Output #define BADBLOCKMARK (0x00) // Status bit pattern #define STATUS_READY (0x40) // Ready #define STATUS_ERROR (0x01) // Error #define STATUS_ILLACC (0x20) // Illigar Access #define NF_ECCERR0_ALL_FF 0x40000000 #define NF_ECCERR0_ECC_READY 0x20000000 //----------------------------------------------------------------------------- #define NF_CMD(cmd) {g_pNFConReg->NFCMD = (unsigned char)(cmd);} #define NF_ADDR(addr) {g_pNFConReg->NFADDR = (unsigned char)(addr);} #define NF_nFCE_L() {g_pNFConReg->NFCONT &= ~(1<<1);} #define NF_nFCE_H() {g_pNFConReg->NFCONT |= (1<<1);} #define NF_ECC_DIRECTION_IN() {g_pNFConReg->NFCONT &= ~(1<<18);} #define NF_ECC_DIRECTION_OUT() {g_pNFConReg->NFCONT |= (1<<18);} #define NF_ECC_8BIT_STOP() {g_pNFConReg->NFCONT |= (1<<12);} //stop the last encode or decode of 8bit mode. #define NF_RSTECC() {g_pNFConReg->NFCONT |= ((1<<5) | (1<<4));} #define NF_MSGLENGTH_512() {g_pNFConReg->NFCONF &= ~(1<<25);} #define NF_MSGLENGTH_24() {g_pNFConReg->NFCONF |= (1<<25);} #define NF_ECCTYPE_CLR (g_pNFConReg->NFCONF &= ~(3<<23)) #define NF_ECCTYPE_1BIT() {NF_ECCTYPE_CLR;} #define NF_ECCTYPE_4BIT() {NF_ECCTYPE_CLR |= (1<<24);} #define NF_ECCTYPE_8BIT() {NF_ECCTYPE_CLR |= (1<<23);} #define NF_MECC_UnLock() {g_pNFConReg->NFCONT &= ~(1<<7);} #define NF_MECC_Lock() {g_pNFConReg->NFCONT |= (1<<7);} #define NF_SECC_UnLock() {g_pNFConReg->NFCONT &= ~(1<<6);} #define NF_SECC_Lock() {g_pNFConReg->NFCONT |= (1<<6);} #define NF_CLEAR_RB() {g_pNFConReg->NFSTAT |= (1<<4);} // Have write '1' to clear this bit. #define NF_DETECT_RB() {while((g_pNFConReg->NFSTAT&0x11)!=0x11);} // RnB_Transdetect & RnB #define NF_WAITRB() {while (!(g_pNFConReg->NFSTAT & (1<<0))) ; } #define NF_RDDATA_BYTE() (g_pNFConReg->NFDATA) #define NF_RDDATA_WORD() (*(UINT32 *)0xb0200010) #define NF_WRDATA_BYTE(data) {g_pNFConReg->NFDATA = (UINT8)(data);} #define NF_WRDATA_WORD(data) {*(UINT32 *)0xb0200010 = (UINT32)(data);} #define NF_RDMECC0() (g_pNFConReg->NFMECC0) #define NF_RDMECC1() (g_pNFConReg->NFMECC1) #define NF_RDSECC() (g_pNFConReg->NFSECC) #define NF_RDM8ECC0() (g_pNFConReg->NFM8ECC0) #define NF_RDM8ECC1() (g_pNFConReg->NFM8ECC1) #define NF_RDM8ECC2() (g_pNFConReg->NFM8ECC2) #define NF_RDM8ECC3() (g_pNFConReg->NFM8ECC3) #define NF_RDMECCD0() (g_pNFConReg->NFMECCD0) #define NF_RDMECCD1() (g_pNFConReg->NFMECCD1) #define NF_RDSECCD() (g_pNFConReg->NFSECCD) #define NF_ECC_ERR0 (g_pNFConReg->NFECCERR0) #define NF_ECC_ERR1 (g_pNFConReg->NFECCERR1) #define NF_ECC8BIT_NUM ((g_pNFConReg->NF8ECCERR0 & (0xf<<25))>>25) #define NF_ECC8LOCATION_BYTE1 (g_pNFConReg->NF8ECCERR0 & (0x3ff)) #define NF_ECC8LOCATION_BYTE2 ((g_pNFConReg->NF8ECCERR0 & (0x3ff<<15))>>15) #define NF_ECC8LOCATION_BYTE3 (g_pNFConReg->NF8ECCERR1 & (0x3ff)) #define NF_ECC8LOCATION_BYTE4 ((g_pNFConReg->NF8ECCERR1 & (0x3ff<<11))>>11) #define NF_ECC8LOCATION_BYTE5 ((g_pNFConReg->NF8ECCERR1 & (0x3ff<<22))>>22) #define NF_ECC8LOCATION_BYTE6 (g_pNFConReg->NF8ECCERR2 & (0x3ff)) #define NF_ECC8LOCATION_BYTE7 ((g_pNFConReg->NF8ECCERR2 & (0x3ff<<11))>>11) #define NF_ECC8LOCATION_BYTE8 ((g_pNFConReg->NF8ECCERR2 & (0x3ff<<22))>>22) #define NF_ECC8LOCATION_BIT(n) (n <= 4)?((g_pNFConReg->NFMLC8BITPT0 & (0xff<<((n-1)*8)))>>((n-1)*8)):((g_pNFConReg->NFMLC8BITPT1 & (0xff<<((n-5)*8)))>>((n-5)*8)) #define NF_ECC4BIT_NUM ((g_pNFConReg->NFECCERR0 & (0x7<<26))>>26) #define NF_ECC4LOCATION_BYTE(n) ((n <= 2)?((g_pNFConReg->NFECCERR0 & (0x3ff<<((n-1)*16)))>>((n-1)*16)):((g_pNFConReg->NFECCERR1 & (0x3ff<<((n-3)*16)))>>((n-3)*16))) #define NF_ECC4LOCATION_BIT(n) ((g_pNFConReg->NFMLCBITPT & (0xff<<((n-1)*8)))>>((n-1)*8)) #define NF_WRMECCD0(data) {g_pNFConReg->NFMECCD0 = (data);} #define NF_WRMECCD1(data) {g_pNFConReg->NFMECCD1 = (data);} #define NF_WRSECCD(data) {g_pNFConReg->NFSECCD = (data);} #define NF_RDSTAT (g_pNFConReg->NFSTAT) //----------------------------------------------------------------------------- typedef enum { ECC_CORRECT_MAIN = 0, // correct Main ECC ECC_CORRECT_SPARE1 = 1, // correct Spare for Sector Info using Main ECC Result Area ECC_CORRECT_SPARE2 = 2, // correct Spare for MECC using Main ECC Result Area ECC_CORRECT_SPARE = 3 // correct Spare using Spare ECC Result Area } ECC_CORRECT_TYPE; //----------------------------------------------------------------------------- #endif // __NAND_H_. nand.h文件里有8bit ECC的相关定义，不要高兴的太早，这里面是有错滴，不知道是不是飞凌那边故意搞错的，还是本来就不是6410的。

且看定义：

#define NF_ECC_8BIT_STOP() {g_pNFConReg->NFCONT |= (1<<12);} //stop the last encode or decode of 8bit mode.

对比文档看一下这个NFCONT[12]是干什么的

NFCONT[11]这个才是8bitStop，但为什么源码中要定义NFCONT[12]为NF_ECC_8BIT_STOP，这个容易让人产生误解。咱还是改一下吧！

#define NF_ECC_8BIT_STOP() {g_pNFConReg->NFCONT |= (1<<11);}

相关引用的暂时到这里，下一篇将会开始源码分析

接着上一篇，这一篇介绍cpp部分

fmd.cpp，这里将逐个函数进行分析讲解：

引用头文件这部分不需要更改

1、读取Flash的ID:

/* @func DWORD | ReadFlashID | Reads the flash manufacturer and device codes. @rdesc Manufacturer and device codes. @comm @xref */ static DWORD ReadFlashID(void) { BYTE Mfg, Dev, Nouse, Infoma, Planesize; int i; NF_nFCE_L(); // Deselect the flash chip. NF_CMD(CMD_READID); // Send flash ID read command. NF_ADDR(0); for (i=0; i<10; i++) { Mfg = NF_RDDATA_BYTE(); if (Mfg == 0xEC || Mfg == 0x98) break; } Dev = NF_RDDATA_BYTE(); Nouse = NF_RDDATA_BYTE(); Infoma = NF_RDDATA_BYTE(); Planesize = NF_RDDATA_BYTE(); //RETAILMSG(1, (TEXT("[FMD:ERR] FMD_Init() : page info = 0xx,0xx,0xx\n"), Nouse,Infoma,Planesize)); //According to the read ID from flash, Nouse=0x14,Infoma=0xa5,planesize=0x64,the page size is 2K, block size is 256KB //there are 4096 blocks, plane num=2, plane size=4Gbit //So we should change the cfnand.h nandflash information. NF_nFCE_H(); return ((DWORD)(Mfg<<8)+Dev); } 这个也不需要修改，具体请参照手册

2、flash初始化：

/* @func PVOID | FMD_Init | Initializes the Smart Media NAND flash controller. @rdesc Pointer to S3C2410 NAND controller registers. @comm @xref */ PVOID FMD_Init(LPCTSTR lpActiveReg, PPCI_REG_INFO pRegIn, PPCI_REG_INFO pRegOut) { volatile DWORD nNandID; UINT8 nMID, nDID; UINT32 nCnt; BOOL bNandExt = FALSE; RETAILMSG(1, (TEXT("[FMD] ++FMD_Init() *######\r\n"))); if (pRegIn && pRegIn->MemBase.Num && pRegIn->MemBase.Reg[0]) { g_pNFConReg = (S3C6410_NAND_REG *)(pRegIn->MemBase.Reg[0]); } else { g_pNFConReg = (S3C6410_NAND_REG *)NAND_BASE; } g_pSysConReg = (S3C6410_SYSCON_REG *)SYSCON_BASE; #ifdef SYNC_OP InitializeCriticalSection(&g_csNandFlash); EnterCriticalSection(&g_csNandFlash); #endif // Configure BUS Width and Chip Select for NAND Flash g_pSysConReg->MEM_SYS_CFG &= ~(1<<12); // NAND Flash BUS Width -> 8 bit g_pSysConReg->MEM_SYS_CFG &= ~(0x1<<1); // Xm0CS2 -> NFCON CS0 // Set up initial flash controller configuration. g_pNFConReg->NFCONF = (TACLS<<12) | (TWRPH0<<8) | (TWRPH1<<4); NF_ECCTYPE_4BIT(); g_pNFConReg->NFCONT = (0<<17)|(0<<16)|(0<<10)|(0<<9)|(0<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(0x3<<1)|(1<<0); g_pNFConReg->NFSTAT = (1<<4); nNandID = ReadFlashID(); #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif nMID = (UINT8)(nNandID >> 8); nDID = (UINT8)(nNandID & 0xff); RETAILMSG(1, (TEXT("[FMD:INF] FMD_Init() : Read ID = 0xx\n"), nNandID)); for (nCnt = 0; astNandSpec[nCnt].nMID != 0; nCnt++) { if (nDID == astNandSpec[nCnt].nDID) { bNandExt = TRUE; break; } } if (!bNandExt) { RETAILMSG(1, (TEXT("[FMD:ERR] FMD_Init() : Unknown ID = 0xx\n"), nNandID)); return NULL; } NUM_OF_BLOCKS = astNandSpec[nCnt].nNumOfBlks; PAGES_PER_BLOCK = astNandSpec[nCnt].nPgsPerBlk; SECTORS_PER_PAGE = astNandSpec[nCnt].nSctsPerPg; RETAILMSG(1, (TEXT("[FMD] FMD_Init() : NUM_OF_BLOCKS = %d\n"), NUM_OF_BLOCKS)); RETAILMSG(1, (TEXT("[FMD] FMD_Init() : PAGES_PER_BLOCK = %d\n"), PAGES_PER_BLOCK)); RETAILMSG(1, (TEXT("[FMD] FMD_Init() : SECTORS_PER_PAGE = %d\n"), SECTORS_PER_PAGE)); // gjl if(iSighForSlcMlc == 1) { NUM_OF_BLOCKS = 8192; PAGES_PER_BLOCK = 8; SECTORS_PER_PAGE = 4; } else { NUM_OF_BLOCKS = astNandSpec[nCnt].nNumOfBlks; PAGES_PER_BLOCK = astNandSpec[nCnt].nPgsPerBlk; SECTORS_PER_PAGE = astNandSpec[nCnt].nSctsPerPg; } RETAILMSG(1, (TEXT("[FMD] --FMD_Init()\n"))); return((PVOID)g_pNFConReg); } 上面这个代码是原BSP中的，这个初始化函数里面，有些东西需要修改一下

// Set up initial flash controller configuration. g_pNFConReg->NFCONF = (TACLS<<12) | (TWRPH0<<8) | (TWRPH1<<4);

这个我们对照手册看一下

NFCONF[0]必须写0，NFCONF[2]必须写1，所以最后修改为：

g_pNFConReg->NFCONF = (TACLS<<12) | (TWRPH0<<8) | (TWRPH1<<4) | (1<<2) | (0<<0); 这一句接下来，原代码中使用的是NF_ECCTYPE_4BIT(); 4bit的ECC，这里我们将使用8bit的ECC，修改为

NF_ECCTYPE_8BIT(); // use 8bit ECC

接下来初始化配置NFCONT

原：

g_pNFConReg->NFCONT = (0<<17)|(0<<16)|(0<<10)|(0<<9)|(0<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(0x3<<1)|(1<<0);

参照手册修改为：

g_pNFConReg->NFCONT = (0<<13)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0);

接下来直接看到

// gjl if(iSighForSlcMlc == 1) { NUM_OF_BLOCKS = 8192; PAGES_PER_BLOCK = 8; SECTORS_PER_PAGE = 4; } else { NUM_OF_BLOCKS = astNandSpec[nCnt].nNumOfBlks; PAGES_PER_BLOCK = astNandSpec[nCnt].nPgsPerBlk; SECTORS_PER_PAGE = astNandSpec[nCnt].nSctsPerPg; } 这里if中的NUM_OF_BLOCKS = 8192;这个定死了，不大好，咱改成（修改之后，可以同时兼容K9GAG08U0D 2G和K9LBG08U0D 4G的Nandflash） NUM_OF_BLOCKS = astNandSpec[nCnt].nNumOfBlks; 到此，FMD_Init()函数就基本上搞掂了。

3、FMD_ReadSector()

/* @func BOOL | FMD_ReadSector | Reads the specified sector(s) from NAND flash. @rdesc TRUE = Success, FALSE = Failure. @comm @xref */ BOOL FMD_ReadSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { BOOL bRet; //RETAILMSG(1, (TEXT("[R:0xx] \n"), startSectorAddr)); #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] ++FMD_ReadSector(0xx) \n"), startSectorAddr)); #endif #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif if ( IS_LB ) { bRet = FMD_LB_ReadSector(startSectorAddr, pSectorBuff, pSectorInfoBuff, dwNumSectors); } else { bRet = FMD_SB_ReadSector(startSectorAddr, pSectorBuff, pSectorInfoBuff, dwNumSectors); } #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] --FMD_ReadSector()\n"))); #endif return bRet; } 这里我们不需要做修改，不过其中调用的FMD_LB_ReadSector()函数待会需要修改一下（FMD_LB_ReadSector()是针对Nandflash，4bit或8bit的ECC；而FMD_SB_ReadSector()是针对Norflash，1bit的ecc校验）

4、FMD_EraseBlock() 擦除块

/* @func BOOL | FMD_EraseBlock | Erases the specified flash block. @rdesc TRUE = Success, FALSE = Failure. @comm @xref */ BOOL FMD_EraseBlock(BLOCK_ID blockID) { BOOL bRet = TRUE; #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] ++FMD_EraseBlock(0xx) \n"), blockID)); #endif #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif if ( IS_LB ) { bRet = FMD_LB_EraseBlock(blockID); } else { bRet = FMD_SB_EraseBlock(blockID); } #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] --FMD_EraseBlock()\n"))); #endif return bRet; } 这个函数也没有什么需要修改的，其中调用到的FMD_LB_EraseBlock()待会会讲到。

5、FMD_WriteSector()

/* @func BOOL | FMD_WriteSector | Writes the specified data to the specified NAND flash sector/page. @rdesc TRUE = Success, FALSE = Failure. @comm @xref */ BOOL FMD_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { BOOL bRet = TRUE; #if DEBUG_WRITE_READ_EQUAL BYTE pSectorBuffRead[4096]; // gjl 2048 SectorInfo SectorInfoBuffRead; PSectorInfo pSectorInfoBuffRead = &SectorInfoBuffRead; BYTE *temp = (BYTE*)pSectorInfoBuff; BYTE *temp1 = (BYTE*)pSectorInfoBuffRead; UINT16 nSectorLoop,j=40; #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector(0xx) \n"), startSectorAddr)); #endif #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif if ( IS_LB ) { bRet = FMD_LB_WriteSector(startSectorAddr, pSectorBuff, pSectorInfoBuff, dwNumSectors); #if DEBUG_WRITE_READ_EQUAL FMD_LB_ReadSector(startSectorAddr, pSectorBuffRead, pSectorInfoBuffRead, dwNumSectors); for (nSectorLoop = 0; nSectorLoop < 2048; nSectorLoop++) { if(pSectorBuff[nSectorLoop] != pSectorBuffRead[nSectorLoop]) break; } RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector equal number = %x \n"), nSectorLoop)); for (nSectorLoop = 0; nSectorLoop < 8; nSectorLoop++) { if(temp1[nSectorLoop] != temp[nSectorLoop]) break; } RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector informationequal equal number = %x \n"), nSectorLoop)); RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector sector bytes:\n"))); for (nSectorLoop = 0; nSectorLoop < 2048; nSectorLoop++) { if(j--==0) { j=40; RETAILMSG(1, (TEXT("\n"))); } RETAILMSG(1, (TEXT("%x "), pSectorBuff[nSectorLoop])); } RETAILMSG(1, (TEXT("\n end\n"))); RETAILMSG(1, (TEXT("[FMD] ++FMD_ReadSector sector bytes:\n"))); for (nSectorLoop = 0; nSectorLoop < 2048; nSectorLoop++) { if(j--==0) { j=40; RETAILMSG(1, (TEXT("\n"))); } RETAILMSG(1, (TEXT("%x "), pSectorBuffRead[nSectorLoop])); } RETAILMSG(1, (TEXT("\n end\n"))); for (nSectorLoop = 0; nSectorLoop < 8; nSectorLoop++) { if(g_MECCBuf_R[nSectorLoop] != g_MECCBuf[nSectorLoop]) break; } RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector MECC data equal number = %x \n"), nSectorLoop)); for (nSectorLoop = 0; nSectorLoop < 8; nSectorLoop++) { if(g_SECCBuf_R[nSectorLoop] != g_SECCBuf[nSectorLoop]) break; } RETAILMSG(1, (TEXT("[FMD] ++FMD_WriteSector SECC data equal number = %x \n"), nSectorLoop)); #endif } else { bRet = FMD_SB_WriteSector(startSectorAddr, pSectorBuff, pSectorInfoBuff, dwNumSectors); } #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] --FMD_WriteSector()\n"))); #endif return bRet; } 该函数也没有什么地方需要修改的。

6、FMD_PowerUp()

VOID FMD_PowerUp(VOID) { #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] FMD_PowerUp() \n"))); #endif // Set up initial flash controller configuration. g_pNFConReg->NFCONF = (TACLS<<12) | (TWRPH0<<8) | (TWRPH1<<4); g_pNFConReg->NFCONT = (0<<17)|(0<<16)|(0<<10)|(0<<9)|(0<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(0x3<<1)|(1<<0); g_pNFConReg->NFSTAT = (1<<4); } 这里我们参照之前在FMD_Init()的配置，修改其中的NFCONF和NFCONT的配置为：

g_pNFConReg->NFCONF = (TACLS<<12) | (TWRPH0<<8) | (TWRPH1<<4) | (1<<2) | (0<<0); g_pNFConReg->NFCONT = (0<<13)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0);

7、FMD_PowerDown()

VOID FMD_PowerDown(VOID) { #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] FMD_PowerDown() \n"))); #endif } 该函数不需要修改什么。

接下来的这几个函数都不需要修改：

BOOL FMD_OEMIoControl(DWORD dwIoControlCode, PBYTE pInBuf, DWORD nInBufSize, PBYTE pOutBuf, DWORD nOutBufSize, PDWORD pBytesReturned) { switch(dwIoControlCode) { case IOCTL_FMD_GET_INTERFACE: { RETAILMSG(1, (TEXT("[FMD] FMD_OEMIoControl() : IOCTL_FMD_GET_INTERFACE\n"))); if (!pOutBuf || nOutBufSize < sizeof(FMDInterface)) { DEBUGMSG(1, (TEXT("FMD_OEMIoControl: IOCTL_FMD_GET_INTERFACE bad parameter(s).\n"))); return(FALSE); } PFMDInterface pInterface = (PFMDInterface)pOutBuf; pInterface->cbSize = sizeof(FMDInterface); pInterface->pInit = FMD_Init; pInterface->pDeInit = FMD_Deinit; pInterface->pGetInfo = FMD_GetInfo; pInterface->pGetInfoEx = NULL; //FMD_GetInfoEx; pInterface->pGetBlockStatus = FMD_GetBlockStatus; pInterface->pSetBlockStatus = FMD_SetBlockStatus; pInterface->pReadSector = FMD_ReadSector; pInterface->pWriteSector = FMD_WriteSector; pInterface->pEraseBlock = FMD_EraseBlock; pInterface->pPowerUp = FMD_PowerUp; pInterface->pPowerDown = FMD_PowerDown; pInterface->pGetPhysSectorAddr = NULL; break; } case IOCTL_FMD_LOCK_BLOCKS: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_LOCK_BLOCKS Not Supported\n"))); return FALSE; case IOCTL_FMD_UNLOCK_BLOCKS: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_UNLOCK_BLOCKS Not Supported\n"))); return FALSE; case IOCTL_FMD_READ_RESERVED: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_READ_RESERVED\n"))); return FALSE; case IOCTL_FMD_WRITE_RESERVED: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_WRITE_RESERVED\n"))); return FALSE; case IOCTL_FMD_GET_RESERVED_TABLE: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_GET_RESERVED_TABLE\n"))); return FALSE; case IOCTL_FMD_SET_REGION_TABLE: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_SET_REGION_TABLE\n"))); return FALSE; case IOCTL_FMD_SET_SECTORSIZE: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_SET_SECTORSIZE\n"))); return FALSE; case IOCTL_FMD_RAW_WRITE_BLOCKS: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_RAW_WRITE_BLOCKS\n"))); return FALSE; case IOCTL_FMD_GET_RAW_BLOCK_SIZE: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_GET_RAW_BLOCK_SIZE\n"))); return FALSE; case IOCTL_FMD_GET_INFO: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_GET_INFO\n"))); return FALSE; case IOCTL_FMD_SET_XIPMODE : RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_SET_XIPMODE\n"))); return FALSE; case IOCTL_FMD_GET_XIPMODE: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_FMD_GET_XIPMODE\n"))); return FALSE; case IOCTL_DISK_FLUSH_CACHE: //RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : IOCTL_DISK_FLUSH_CACHE\n"))); return TRUE; default: RETAILMSG(1, (TEXT("[FMD:ERR] FMD_OEMIoControl() : Unknown IOCTL (0xx)\n"), dwIoControlCode)); return FALSE; } return TRUE; } BOOL FMD_Deinit(PVOID hFMD) { #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] FMD_Deinit() \n"))); #endif return(TRUE); } /* @func BOOL | FMD_GetInfo | Provides information on the NAND flash. @rdesc TRUE = Success, FALSE = Failure. @comm @xref */ BOOL FMD_GetInfo(PFlashInfo pFlashInfo) { // Add by AlexLee RunNo[5] UINT32 nCnt; UINT32 nNandID; UINT8 nMID, nDID; if (pFlashInfo == NULL) { RETAILMSG(1, (TEXT("[FMD:ERR] FMD_GetInfo() : Invalid Parameter\n"))); return(FALSE); } pFlashInfo->flashType = NAND; #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif nNandID = ReadFlashID(); #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif nMID = nNandID >> 8; nDID = nNandID & 0xff; for (nCnt = 0; astNandSpec[nCnt].nMID != 0; nCnt++) { if (nDID == astNandSpec[nCnt].nDID) { break; } } // OK, instead of reading it from the chip, we use the hardcoded // numbers here. pFlashInfo->dwNumBlocks = NUM_OF_BLOCKS; pFlashInfo->wSectorsPerBlock = PAGES_PER_BLOCK; pFlashInfo->wDataBytesPerSector = NAND_SECTOR_SIZE; pFlashInfo->dwBytesPerBlock = (PAGES_PER_BLOCK * NAND_SECTOR_SIZE); //RETAILMSG(1, (TEXT("[FMD] FMD_GetInfo() : NUMBLOCKS = %d(0x%x), SECTORSPERBLOCK = %d(0x%x), BYTESPERSECTOR = %d(0x%x) \n"), pFlashInfo->dwNumBlocks, pFlashInfo->dwNumBlocks, pFlashInfo->wSectorsPerBlock, pFlashInfo->wSectorsPerBlock, pFlashInfo->wDataBytesPerSector, pFlashInfo->wDataBytesPerSector)); // del by alexlee return TRUE; } /* @func DWORD | FMD_GetBlockStatus | Returns the status of the specified block. @rdesc Block status (see fmd.h). @comm @xref */ DWORD FMD_GetBlockStatus(BLOCK_ID blockID) { DWORD dwResult = 0; #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] ++FMD_GetBlockStatus(0xx) \n"), blockID)); #endif #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif if ( IS_LB ) { dwResult = FMD_LB_GetBlockStatus(blockID); } else { dwResult = FMD_SB_GetBlockStatus(blockID); } #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] --FMD_GetBlockStatus()\n"))); #endif return dwResult; } /* @func BOOL | FMD_SetBlockStatus | Marks the block with the specified block status. @rdesc TRUE = Success, FALSE = Failure. @comm @xref */ BOOL FMD_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus) { BOOL bRet = TRUE; #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] ++FMD_SetBlockStatus(0xx, 0xx) \n"), blockID, dwStatus)); #endif #ifdef SYNC_OP EnterCriticalSection(&g_csNandFlash); #endif if ( IS_LB ) { bRet = FMD_LB_SetBlockStatus(blockID, dwStatus); } else { bRet = FMD_SB_SetBlockStatus(blockID, dwStatus); } #ifdef SYNC_OP LeaveCriticalSection(&g_csNandFlash); #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("[FMD] --FMD_SetBlockStatus()\n"))); #endif return bRet; }

文章有点长，先到这里了，关键点将在下一篇介绍

接着上一篇

1、ECC_CorrectData() 查找ECC错误并矫正

BOOL ECC_CorrectData(SECTOR_ADDR sectoraddr, LPBYTE pData, UINT32 nRetEcc, ECC_CORRECT_TYPE nType) { DWORD nErrDataNo; DWORD nErrBitNo; //BYTE Status; BYTE nErrDataNum; UINT8 nErrByteNum; UINT8 countdown = 155; BOOL bRet = TRUE; //RETAILMSG(1, (TEXT("#### FMD_DRIVER:::ECC_CorrectData %x, %x, %x\n"), sectoraddr, nRetEcc, nType)); #if 0 if( (nRetEcc & NF_ECC8ERR0_ECC_READY) ) return TRUE; #endif // 8bit ECC error searching engine needs mini mum 372 cycles to find any error countdown = 372; while(countdown--); // 等待ECC错误查找完毕 while(NF_ECC8_ERR0 & 0x80000000); // 获取8bit ECC解码结果 nErrDataNum = NF_ECC8BIT_NUM; // No error, if free page (all 0xff) if( (g_pNFConReg->NF8ECCERR0 >> 29) & 0x1 ){ nErrDataNum = 0; } if (nErrDataNum == 0) { bRet = TRUE; RETAILMSG(0,(TEXT("No Error\n"))); goto finished; } else if (nErrDataNum == 9) { bRet = FALSE; RETAILMSG(1,(TEXT("More than 8-bit error, uncorrectable\n"))); goto finished; } else if (nErrDataNum > 9) { bRet = FALSE; RETAILMSG(1,(TEXT("Reserved\n"))); goto finished; } else { // 获取错误位对应的位置 for (nErrByteNum = 1; nErrByteNum <= nErrDataNum; nErrByteNum++) { switch(nErrByteNum) { case 1: nErrDataNo = NF_ECC8LOCATION_BYTE1; break; case 2: nErrDataNo = NF_ECC8LOCATION_BYTE2; break; case 3: nErrDataNo = NF_ECC8LOCATION_BYTE3; break; case 4: nErrDataNo = NF_ECC8LOCATION_BYTE4; break; case 5: nErrDataNo = NF_ECC8LOCATION_BYTE5; break; case 6: nErrDataNo = NF_ECC8LOCATION_BYTE6; break; case 7: nErrDataNo = NF_ECC8LOCATION_BYTE7; break; case 8: nErrDataNo = NF_ECC8LOCATION_BYTE8; break; default:break; } // 定位到具体错误位的位置 nErrBitNo = NF_ECC8LOCATION_BIT(nErrByteNum); // 矫正错误位 (pData)[nErrDataNo] ^= (1<<nErrBitNo); RETAILMSG(1, (TEXT("8bit ECC_CorrectData %x, %x, %x, %x\n"), nErrDataNum, nErrByteNum, nErrDataNo, nErrBitNo)); } } inished: return bRet;

这里是修改后的，支持8bit ECC校验。

注意到上面的 // No error, if free page (all 0xff) if( (g_pNFConReg->NF8ECCERR0 >> 29) & 0x1 ){ nErrDataNum = 0; }

代码了吗？让我们对比手册看看这个NF8ECCERR0[29]是何许人也

看到了吧，NF8ECCERR0[29]是保留位。然而，我参考6410的MLC的BSP源码，发现里面有用到这个位来判断是否全为0xff。在飞凌最新发布的linux3.0的源码中也查看到有用到这个保留位，而且还是针对8bit ECC来使用的，参考的两个源码都支持这两个Nandflash。为什么6410的芯片文档上会写成是保留位？是笔误还是有所保留？为啥三星自己的MLC的BSP中也有使用？具体大家自己纠结去吧，反正上面这样使用了也没见着啥不良影响。

2、FMD_LB_ReadSector()

原来的代码：

BOOL FMD_LB_ReadSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { ULONG SectorAddr = (ULONG)startSectorAddr; DWORD i, j; volatile DWORD rddata; UINT32 nRetEcc = 0; DWORD MECCBuf[16],tempMECCBuf[2]; // gjl 8 UINT16 nSectorLoop,nSectorLoop1; int NewSpareAddr = 4096; //gjl 2048 int NewDataAddr = 0; int NewSectorAddr = startSectorAddr; int SectorSpareAddr; UINT8 TempSectorInfo[40]; BYTE *pSectorBuff1 = (BYTE *)pSectorBuff; UINT16 k=40; #if CHECK_SPAREECC DWORD SECCBuf[4]; // gjl 2 #endif #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_LB_READSECTOR %x %x\n"),startSectorAddr,NewDataAddr)); #endif if (!pSectorBuff && !pSectorInfoBuff) { return(FALSE); } if ( dwNumSectors > 1 ) { RETAILMSG(1, (TEXT("######## FATAL ERROR => FMD::FMD_ReadSector->dwNumsectors is bigger than 1. \n"))); return FALSE; } if (!pSectorBuff) { if (!NAND_LB_ReadSectorInfo(startSectorAddr, pSectorInfoBuff)) { #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::54321\n"))); #endif return FALSE; } #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::12345\n"))); #endif return TRUE; } NF_nFCE_L(); NF_CLEAR_RB(); NF_CMD(CMD_READ); // Send read command. NF_ADDR((NewSpareAddr)&0xff); NF_ADDR((NewSpareAddr>>8)&0xff); NF_ADDR((NewSectorAddr) & 0xff); NF_ADDR((NewSectorAddr >> 8) & 0xff); #if LB_NEED_EXT_ADDR NF_ADDR((NewSectorAddr >> 16) & 0xff); #endif NF_CMD(CMD_READ3); // 2nd command NF_DETECT_RB(); // Wait for command to complete. NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT(); if (pSectorInfoBuff) { pSectorInfoBuff->bBadBlock = NF_RDDATA_BYTE(); pSectorInfoBuff->dwReserved1 = NF_RDDATA_WORD(); pSectorInfoBuff->bOEMReserved = NF_RDDATA_BYTE(); pSectorInfoBuff->wReserved2 = NF_RDDATA_BYTE(); pSectorInfoBuff->wReserved2 |= (NF_RDDATA_BYTE()<<8); } else { for(i=0; i<sizeof(SectorInfo)/sizeof(DWORD); i++) { rddata = (DWORD) NF_RDDATA_WORD(); // read and trash the data } } for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); } #if DEBUG_WRITE_READ_EQUAL for (nSectorLoop = 0; nSectorLoop < 8; nSectorLoop++) { g_MECCBuf_R[nSectorLoop] = MECCBuf[nSectorLoop]; } #endif for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE; nSectorLoop++) { NewDataAddr = nSectorLoop * SECTOR_SIZE; NF_CMD(CMD_RDO); // Send read command. NF_ADDR((NewDataAddr)&0xff); NF_ADDR((NewDataAddr>>8)&0xff); NF_CMD(CMD_RDO2); // 2nd command NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT(); NF_RSTECC(); NF_MECC_UnLock(); if( ((DWORD) (pSectorBuff+nSectorLoop*SECTOR_SIZE)) & 0x3) { for(i=0; i<SECTOR_SIZE/sizeof(DWORD); i++) { rddata = (DWORD) NF_RDDATA_WORD(); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+0] = (BYTE)(rddata & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+1] = (BYTE)(rddata>>8 & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+2] = (BYTE)(rddata>>16 & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+3] = (BYTE)(rddata>>24 & 0xff); } } else { RdPage512(pSectorBuff+nSectorLoop*SECTOR_SIZE); // Read page/sector data. } SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8; NF_WRDATA_WORD(MECCBuf[2*nSectorLoop]); SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8+4; NF_WRDATA_WORD(MECCBuf[2*nSectorLoop+1]); NF_MECC_Lock(); //decode done while (!(NF_RDSTAT & (1<<6))); tempMECCBuf[0]= NF_RDMECC0(); tempMECCBuf[1] = NF_RDMECC1(); pSectorBuff1 = pSectorBuff+nSectorLoop*SECTOR_SIZE; if (!ECC_CorrectData(startSectorAddr, pSectorBuff1, nRetEcc, ECC_CORRECT_MAIN)) { RETAILMSG(1,(TEXT("ECC ERROR\n"))); return FALSE; } } NF_nFCE_H(); return TRUE; }

这个是飞凌BSP中的源码，里面需要修改的地方还是挺多的。

首先，来看定义部分的 DWORD MECCBuf[16],tempMECCBuf[2]; // gjl 8

由于将要用的是8bit的ECC校验，这个ECC的buffer就应该是32，1page=8*512byte，每读取512byte数据产生的ECC存放在4个32位的寄存器中，所以需要8*4个buffer：

DWORD MECCBuf[32];

至于tempMECCBuf，从上述代码中就可以看出就一垃圾，根本没用到，这里就把它删了。

定义完之后，我们需要使能一些相关的中断（不这样搞的话，发现无法正常校验ECC，具体原因请知道的朋友告知一声）

在

if (!pSectorBuff && !pSectorInfoBuff) { return(FALSE); }

的后面，我们添加以下代码：

g_pNFConReg->NFCONT |= (1<<10); // Enable illegal access interrupt control g_pNFConReg->NFCONT |= (1<<9); // Enable RnB interrupt g_pNFConReg->NFCONT |= (1<<12); // Enable 4bit,8bit ECC decoding completion interrupt control

接下来看到代码：（中间省略的那部分就不介绍了，大家有空可以参考一下LoongEmbedded的csdn blog）

NF_MSGLENGTH_512();

NF_ECCTYPE_4BIT();

我们使用8bit ECC，所以把 NF_ECCTYPE_4BIT(); 修改成

NF_ECCTYPE_8BIT();

之后就是读取SectorInfo数据的操作，再过来就是读取ECC数据的操作： for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); }

由于，我们使用的是8bit ECC，上面只读取了8*2 * 4字节的ECC，而8bit的ECC需要8*4 *4字节，所以修改成：

for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*4; nSectorLoop++) // 8bit ECC,4096/page = 8*512, it has 8*4(register) ECC data { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); }

接下来直接看到循环读取一页数据的操作：

就是 for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE; nSectorLoop++) { NewDataAddr = nSectorLoop * SECTOR_SIZE;

NF_CMD(CMD_RDO); // Send read command. NF_ADDR((NewDataAddr)&0xff); NF_ADDR((NewDataAddr>>8)&0xff); NF_CMD(CMD_RDO2); // 2nd command

NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT();

这里，把上面的 NF_ECCTYPE_4BIT(); 修改成：

NF_ECCTYPE_8BIT();

顺便在上面这一句后面加上两句：

NF_ECC_8BIT_STOP(); // init 8bit ECC decoding NF_ECC_DIRECTION_IN(); // 4/8BIT ECC Decoding, read page

接下来，原代码是：

NF_RSTECC(); NF_MECC_UnLock();

我这里把这两个操作的顺序换一下，变成：

NF_MECC_UnLock(); NF_RSTECC();

在NF_RSTECC()之前必须设置 NF_ECC_8BIT_STOP(); ，因为文档中有说到： if you want to stop current work and start encoding/decoding for new data, you must set 8bitStop(NFCONT[11]) before set InitMECC(NFCONT[5]) bit.

接下来的代码就是读取512字节数据的： if( ((DWORD) (pSectorBuff+nSectorLoop*SECTOR_SIZE)) & 0x3) { for(i=0; i<SECTOR_SIZE/sizeof(DWORD); i++) { rddata = (DWORD) NF_RDDATA_WORD(); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+0] = (BYTE)(rddata & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+1] = (BYTE)(rddata>>8 & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+2] = (BYTE)(rddata>>16 & 0xff); (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+3] = (BYTE)(rddata>>24 & 0xff); } } else { RdPage512(pSectorBuff+nSectorLoop*SECTOR_SIZE); // Read page/sector data. }

然后，就看到代码把前面读取到的ECC接着写进去了，这里应该是写进去的ECC与读取产生的ECC在ECC模块中进行对比，用于查找错误位 SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8; NF_WRDATA_WORD(MECCBuf[2*nSectorLoop]); SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8+4; NF_WRDATA_WORD(MECCBuf[2*nSectorLoop+1]); NF_MECC_Lock();

这里，同样需要修改成写入8bit ECC的：

SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8; NF_WRDATA_WORD(MECCBuf[4*nSectorLoop]); SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8+4; NF_WRDATA_WORD(MECCBuf[4*nSectorLoop+1]); SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8+8; NF_WRDATA_WORD(MECCBuf[4*nSectorLoop+2]); SectorSpareAddr = NewSpareAddr+8+nSectorLoop*8+12; NF_WRDATA_WORD(MECCBuf[4*nSectorLoop+3]); NF_MECC_Lock();

之后，就是等待解码操作的完成： //decode done while (!(NF_RDSTAT & (1<<6))); tempMECCBuf[0]= NF_RDMECC0(); tempMECCBuf[1] = NF_RDMECC1();

后面这两句含有tempMECCBuf的操作可以直接删除了，没用的。处理完这个之后，紧接着，就是查找ECC错误并进行矫正了：

pSectorBuff1 = pSectorBuff+nSectorLoop*SECTOR_SIZE;

if (!ECC_CorrectData(startSectorAddr, pSectorBuff1, nRetEcc, ECC_CORRECT_MAIN)) { RETAILMSG(1,(TEXT("ECC ERROR\n"))); return FALSE; } }

NF_nFCE_H();

在 NF_nFCE_H(); 这句之前，我们需要把使能的一些中断关闭了：

g_pNFConReg->NFCONT &= ~(1<<10); // Disable illegal access interrupt control g_pNFConReg->NFCONT &= ~(1<<9); // Disable RnB interrupt

3、NAND_LB_ReadSectorInfo()

原BSP代码：

BOOL NAND_LB_ReadSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo) { BOOL bRet = TRUE; int NewSpareAddr = 4096; //gjl 2048 int NewSectorAddr = sectorAddr; DWORD MECCBuf[16]; // gjl 8 UINT16 nSectorLoop, i; UINT8 TempInfo[40]; #if CHECK_SPAREECC DWORD SECCBuf[4]; //gjl 2 UINT32 nRetEcc = 0; #endif NF_nFCE_L(); NF_CLEAR_RB(); NF_CMD(CMD_READ); // Send read confirm command. NF_ADDR((NewSpareAddr)&0xff); NF_ADDR((NewSpareAddr>>8)&0xff); NF_ADDR((NewSectorAddr)&0xff); NF_ADDR((NewSectorAddr>>8) & 0xff); #if LB_NEED_EXT_ADDR NF_ADDR((NewSectorAddr >> 16) & 0xff); #endif NF_CMD(CMD_READ3); NF_DETECT_RB(); pInfo->bBadBlock = NF_RDDATA_BYTE(); pInfo->dwReserved1 = NF_RDDATA_WORD(); pInfo->bOEMReserved = NF_RDDATA_BYTE(); pInfo->wReserved2 = NF_RDDATA_BYTE(); pInfo->wReserved2 |= (NF_RDDATA_BYTE()<<8); for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); } NF_nFCE_H(); #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::56565656\n"))); #endif return bRet; }

还是先看定义的 DWORD MECCBuf[16]; // gjl 8

这个我们要改成：

DWORD MECCBuf[32];

接着在 NF_nFCE_L(); 操作之前，添加：

NF_ECCTYPE_8BIT(); // use 8bit ECC type NF_ECC_8BIT_STOP(); // init 8bit ECC decoding

然后，又看到读取ECC的操作： for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); }

这个，我们需要改成：

for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*4; nSectorLoop++) { MECCBuf[nSectorLoop] = NF_RDDATA_WORD(); }

4、FMD_SB_ReadSector()

BOOL FMD_SB_ReadSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { ULONG SectorAddr = (ULONG)startSectorAddr; ULONG MECC; UINT32 nRet = TRUE; UINT32 nRetEcc = 0; #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbreadT \n"))); #endif if (!pSectorBuff && !pSectorInfoBuff) { RETAILMSG(1,(TEXT("[FMD:ERR] FMD_SB_ReadSector(0xx, 0xx) : Invalid Parameter\n"), pSectorBuff, pSectorInfoBuff)); return(FALSE); } while (dwNumSectors--) { NF_RSTECC(); NF_MECC_UnLock(); NF_nFCE_L(); if (!pSectorBuff) { NF_CLEAR_RB(); NF_CMD(CMD_READ2); // Send read confirm command. NF_ADDR(0); // Ignored. NF_ADDR(SectorAddr & 0xff); // Page address. NF_ADDR((SectorAddr >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((SectorAddr >> 16) & 0xff); #endif NF_DETECT_RB(); RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information. pSectorInfoBuff++; } else { NF_CLEAR_RB(); NF_CMD(CMD_READ); // Send read command. NF_ADDR(0); // Column = 0. NF_ADDR(SectorAddr & 0xff); // Page address. NF_ADDR((SectorAddr >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((SectorAddr >> 16) & 0xff); #endif NF_DETECT_RB(); // Wait for command to complete. if( ((DWORD) pSectorBuff) & 0x3) { RdPage512Unalign (pSectorBuff); } else { RdPage512(pSectorBuff); // Read page/sector data. } NF_MECC_Lock(); if (pSectorInfoBuff) { RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information. pSectorInfoBuff ++; } else { BYTE TempInfo[8]; RdPageInfo(TempInfo); // Read page/sector information. } MECC = NF_RDDATA_BYTE() << 0; MECC |= NF_RDDATA_BYTE() << 8; MECC |= NF_RDDATA_BYTE() << 16; MECC |= (NF_RDMECC0() &0xff000000); //MECC |= NF_RDDATA_BYTE() << 24; NF_WRMECCD0( ((MECC&0xff00)<<8)|(MECC&0xff) ); NF_WRMECCD1( ((MECC&0xff000000)>>8)|((MECC&0xff0000)>>16) ); nRetEcc = NF_ECC_ERR0; switch(nRetEcc & 0x3) { case 0: // No Error nRet = TRUE; break; case 1: // 1-bit Error(Correctable) RETAILMSG(1,(TEXT("ECC correctable error(0x%x)\n"), SectorAddr)); (pSectorBuff)[(nRetEcc>>7)&0x7ff] ^= (1<<((nRetEcc>>4)&0x7)); nRet = TRUE; break; case 2: // Multiple Error RETAILMSG(1,(TEXT("ECC Uncorrectable error(0x%x)\n"), SectorAddr)); nRet = FALSE; break; case 3: // ECC area Error RETAILMSG(1,(TEXT("ECC area error\n"))); default: nRet = FALSE; break; } pSectorBuff += NAND_SECTOR_SIZE; } NF_nFCE_H(); ++SectorAddr; } return(nRet); }

FMD_SB_ReadSector()是介绍SLC读取操作的，这里不用修改。

到此，这一篇就把ECC矫正和读取数据的部分给搞掂了。下一篇将介绍写数据的部分

近段时间比较忙，接着上一篇，这篇主要介绍到写的部分

1、FMD_LB_WriteSector() MLC写sector

BOOL FMD_LB_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { DWORD i; BOOL bRet = TRUE; volatile DWORD wrdata; DWORD MECCBuf[16]; // 16 gjl UINT16 nSectorLoop; int NewSpareAddr = 4096; // 2048 gjl int NewDataAddr = 0; int NewSectorAddr = startSectorAddr; #if CHECK_SPAREECC DWORD SECCBuf[4]; // 2 gjl #endif #if (NAND_DEBUG) RETAILMSG(1, (TEXT("FMD::FMD_LB_WriteSector 0x%x \n"), startSectorAddr)); #endif if (!pSectorBuff && !pSectorInfoBuff) return(FALSE); if ( dwNumSectors > 1 ) { RETAILMSG(1, (TEXT("######## FATAL ERROR => FMD::FMD_WriteSector->dwNumsectors is bigger than 1. \n"))); return FALSE; } if (!pSectorBuff) { NAND_LB_WriteSectorInfo(startSectorAddr, pSectorInfoBuff); return TRUE; } // Enable Chip NF_nFCE_L(); NF_CLEAR_RB(); // Issue command NF_CMD(CMD_WRITE); // Setup address NF_ADDR((NewDataAddr)&0xff); NF_ADDR((NewDataAddr>>8)&0xff); NF_ADDR((NewSectorAddr)&0xff); NF_ADDR((NewSectorAddr>>8)&0xff); #if LB_NEED_EXT_ADDR NF_ADDR((NewSectorAddr>>16)&0xff); #endif for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE; nSectorLoop++) { // Initialize ECC register NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT(); NF_RSTECC(); NF_MECC_UnLock(); // Special case to handle un-aligned buffer pointer. // if( ((DWORD) (pSectorBuff+nSectorLoop*SECTOR_SIZE)) & 0x3) { // Write the data for(i=0; i<SECTOR_SIZE/sizeof(DWORD); i++) { wrdata = (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+0]; wrdata |= (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+1]<<8; wrdata |= (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+2]<<16; wrdata |= (pSectorBuff+nSectorLoop*SECTOR_SIZE)[i*4+3]<<24; NF_WRDATA_WORD(wrdata); } } else { WrPage512(pSectorBuff+nSectorLoop*SECTOR_SIZE); } // Read out the ECC value generated by HW NF_MECC_Lock(); //encode done while (!(NF_RDSTAT & (1<<7))); MECCBuf[2*nSectorLoop] = NF_RDMECC0(); MECCBuf[2*nSectorLoop+1] = NF_RDMECC1(); #if DEBUG_WRITE_READ_EQUAL g_MECCBuf[2*nSectorLoop] = MECCBuf[2*nSectorLoop]; g_MECCBuf[2*nSectorLoop+1] = MECCBuf[2*nSectorLoop+1]; #endif } NF_CMD(CMD_RDI); NF_ADDR((NewSpareAddr)&0xff); NF_ADDR((NewSpareAddr>>8)&0xff); // Write the SectorInfo data to the media // NOTE: This hardware is odd: only a byte can be written at a time and it must reside in the // upper byte of a USHORT. if(pSectorInfoBuff) { // Write the first reserved field (DWORD) NF_WRDATA_BYTE(pSectorInfoBuff->bBadBlock); NF_WRDATA_WORD(pSectorInfoBuff->dwReserved1); NF_WRDATA_BYTE(pSectorInfoBuff->bOEMReserved); NF_WRDATA_BYTE(pSectorInfoBuff->wReserved2&0xff); NF_WRDATA_BYTE((pSectorInfoBuff->wReserved2>>8)&0xff); } else { // Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data) for(i=0; i<sizeof(SectorInfo)/sizeof(DWORD); i++) { NF_WRDATA_WORD(0xffffffff); } } // Write the ECC value to the flash for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) NF_WRDATA_WORD(MECCBuf[nSectorLoop]); // Finish up the write operation NF_CMD(CMD_WRITE2); // Wait for RB NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("FMD_WriteSector() ######## Error Programming page (Illigar Access) %d!\n"), startSectorAddr)); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status NF_CMD(CMD_STATUS); if(NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("FMD_WriteSector() ######## Error Programming page %d!\n"), startSectorAddr)); bRet = FALSE; } } // Disable the chip NF_nFCE_H(); return bRet; }

这个是飞凌的源码，这里需要修改成8bit的ECC。

变量定义这里需要把 DWORD MECCBuf[16]; 修改成：

DWORD MECCBuf[32];

在 if (!pSectorBuff) { NAND_LB_WriteSectorInfo(startSectorAddr, pSectorInfoBuff); return TRUE; }

操作之前，添加使能中断的操作：

g_pNFConReg->NFCONT |= (1<<10); // Enable illegal access interrupt control g_pNFConReg->NFCONT |= (1<<9); // Enable RnB interrupt

for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE; nSectorLoop++)这里是循环写一个block的页数据。

把

NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT();

中的 NF_ECCTYPE_4BIT(); 修改成：

NF_ECCTYPE_8BIT(); NF_ECC_8BIT_STOP(); NF_ECC_DIRECTION_OUT();

在

//encode done while (!(NF_RDSTAT & (1<<7)));

处理的后面，把

MECCBuf[2*nSectorLoop] = NF_RDMECC0(); MECCBuf[2*nSectorLoop+1] = NF_RDMECC1();

修改成：

MECCBuf[4*nSectorLoop] = NF_RDM8ECC0(); MECCBuf[4*nSectorLoop+1] = NF_RDM8ECC1(); MECCBuf[4*nSectorLoop+2] = NF_RDM8ECC2(); MECCBuf[4*nSectorLoop+3] = NF_RDM8ECC3() & 0xff;

在for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE; nSectorLoop++)循环结束的后面，

NF_CMD(CMD_RDI); NF_ADDR((NewSpareAddr)&0xff); NF_ADDR((NewSpareAddr>>8)&0xff);

操作之前，添加：

NF_ECCTYPE_8BIT(); NF_ECC_8BIT_STOP();

看到写入ECC数据部分：

// Write the ECC value to the flash for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*2; nSectorLoop++) NF_WRDATA_WORD(MECCBuf[nSectorLoop]);

这里需要把for修改成：

for (nSectorLoop = 0; nSectorLoop < SECTORS_PER_PAGE*4; nSectorLoop++)

在片选操作

// Disable the chip NF_nFCE_H();

之前添加：

g_pNFConReg->NFCONT &= ~(1<<10); // Disable illegal access interrupt control g_pNFConReg->NFCONT &= ~(1<<9); // Disable RnB interrupt

到此，写入部分修改完毕

2、NAND_LB_WriteSectorInfo() 写sector信息

BOOL NAND_LB_WriteSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo) { BOOL bRet = TRUE; int NewSpareAddr = 4096; // gjl 2048 int NewSectorAddr = sectorAddr; #if CHECK_SPAREECC DWORD SECCBuf[4]; // gjl 2 #endif // Chip enable NF_nFCE_L(); NF_CLEAR_RB(); // Write the command // First, let's point to the spare area NF_CMD(CMD_WRITE); // Write the address NF_ADDR((NewSpareAddr)&0xff); NF_ADDR((NewSpareAddr>>8)&0xff); NF_ADDR((NewSectorAddr)&0xff); NF_ADDR((NewSectorAddr>>8)&0xff); #if LB_NEED_EXT_ADDR NF_ADDR((NewSectorAddr>>16)&0xff); #endif NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT(); // Now let's write the SectorInfo data // // Write the first reserved field (DWORD) NF_WRDATA_BYTE(pInfo->bBadBlock); NF_WRDATA_WORD(pInfo->dwReserved1); NF_WRDATA_BYTE(pInfo->bOEMReserved); NF_WRDATA_BYTE(pInfo->wReserved2&0xff); NF_WRDATA_BYTE((pInfo->wReserved2>>8)&0xff); NF_WRDATA_WORD(0xffffffff); // Mecc[0] NF_WRDATA_WORD(0xffffffff); // Mecc[1] NF_WRDATA_WORD(0xffffffff); // Mecc[2] NF_WRDATA_WORD(0xffffffff); // Mecc[3] NF_WRDATA_WORD(0xffffffff); // Mecc[4] NF_WRDATA_WORD(0xffffffff); // Mecc[5] NF_WRDATA_WORD(0xffffffff); // Mecc[6] NF_WRDATA_WORD(0xffffffff); // Mecc[7] // Issue the write complete command NF_CMD(CMD_WRITE2); // Check ready bit NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n"), sectorAddr)); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status of program NF_CMD(CMD_STATUS); if( NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n"), sectorAddr)); bRet = FALSE; } } NF_nFCE_H(); return bRet; }

这个是飞凌给的源码，从上面可以看出也是只用到了4bit的ECC。下面我们将其改成8bit的ECC：

看到 NF_MSGLENGTH_512(); NF_ECCTYPE_4BIT();

这两个处理，我们把其中的 NF_ECCTYPE_4BIT(); 修改成

NF_ECCTYPE_8BIT(); // use 8bit ECC type NF_ECC_8BIT_STOP(); // init 8bit ECC decoding

然后，就开始写入sector的信息数据了，这里主要看写入主ECC数据部分，原文的是 NF_WRDATA_WORD(0xffffffff); // Mecc[0] NF_WRDATA_WORD(0xffffffff); // Mecc[1] NF_WRDATA_WORD(0xffffffff); // Mecc[2] NF_WRDATA_WORD(0xffffffff); // Mecc[3] NF_WRDATA_WORD(0xffffffff); // Mecc[4] NF_WRDATA_WORD(0xffffffff); // Mecc[5] NF_WRDATA_WORD(0xffffffff); // Mecc[6] NF_WRDATA_WORD(0xffffffff); // Mecc[7]

这里需要修改成：

// 16 byte Sector0 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[0] NF_WRDATA_WORD(0xffffffff); // Mecc[1] NF_WRDATA_WORD(0xffffffff); // Mecc[2] NF_WRDATA_WORD(0xffffffff); // Mecc[3] // 16 byte Sector1 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[4] NF_WRDATA_WORD(0xffffffff); // Mecc[5] NF_WRDATA_WORD(0xffffffff); // Mecc[6] NF_WRDATA_WORD(0xffffffff); // Mecc[7] // 16 byte Sector2 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[8] NF_WRDATA_WORD(0xffffffff); // Mecc[9] NF_WRDATA_WORD(0xffffffff); // Mecc[10] NF_WRDATA_WORD(0xffffffff); // Mecc[11] // 16 byte Sector3 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[12] NF_WRDATA_WORD(0xffffffff); // Mecc[13] NF_WRDATA_WORD(0xffffffff); // Mecc[14] NF_WRDATA_WORD(0xffffffff); // Mecc[15] // 16 byte Sector4 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[16] NF_WRDATA_WORD(0xffffffff); // Mecc[17] NF_WRDATA_WORD(0xffffffff); // Mecc[18] NF_WRDATA_WORD(0xffffffff); // Mecc[19] // 16 byte Sector5 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[20] NF_WRDATA_WORD(0xffffffff); // Mecc[21] NF_WRDATA_WORD(0xffffffff); // Mecc[22] NF_WRDATA_WORD(0xffffffff); // Mecc[23] // 16 byte Sector6 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[24] NF_WRDATA_WORD(0xffffffff); // Mecc[25] NF_WRDATA_WORD(0xffffffff); // Mecc[26] NF_WRDATA_WORD(0xffffffff); // Mecc[27] // 16 byte Sector7 ECC data NF_WRDATA_WORD(0xffffffff); // Mecc[28] NF_WRDATA_WORD(0xffffffff); // Mecc[29] NF_WRDATA_WORD(0xffffffff); // Mecc[30] NF_WRDATA_WORD(0xffffffff); // Mecc[31]

该函数中剩余的部分就不需要修改了。

这里之所以这样修改，是因为每512字节的主数据就产生4*4字节的ECC，而我们这里每个block有4096字节，即8个512字节，也就是8 * 16个字节的ECC数据。

3、FMD_SB_WriteSector()

BOOL FMD_SB_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors) { BYTE Status; ULONG SectorAddr = (ULONG)startSectorAddr; ULONG MECC; if (!pSectorBuff && !pSectorInfoBuff) return(FALSE); #if (NAND_DEBUG) RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbwrite \n"))); #endif NF_nFCE_L(); // Select the flash chip. while (dwNumSectors--) { if (!pSectorBuff) // Only spare area { // If we are asked just to write the SectorInfo, we will do that separately NF_CMD(CMD_READ2); // Send read command. NF_CMD(CMD_WRITE); // Send write command. NF_ADDR(0); // Column = 0. NF_ADDR(SectorAddr & 0xff); // Page address. NF_ADDR((SectorAddr >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((SectorAddr >> 16) & 0xff); #endif // Write the SectorInfo data to the media. // Spare area[7:0] WrPageInfo((PBYTE)pSectorInfoBuff); NF_CLEAR_RB(); NF_CMD(CMD_WRITE2); // Send write confirm command. NF_DETECT_RB(); NF_CMD(CMD_STATUS); Status = NF_RDDATA_BYTE(); // Read command status. if (Status & STATUS_ERROR) { NF_nFCE_H(); // Deselect the flash chip. //SetKMode (bLastMode); return(FALSE); } pSectorInfoBuff++; } else // Main area+Spare area. { NF_CMD(CMD_READ); // Send read command. NF_CMD(CMD_WRITE); // Send write command. NF_ADDR(0); // Column = 0. NF_ADDR(SectorAddr & 0xff); // Page address. NF_ADDR((SectorAddr >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((SectorAddr >> 16) & 0xff); #endif // Special case to handle un-aligned buffer pointer. NF_RSTECC(); NF_MECC_UnLock(); if( ((DWORD) pSectorBuff) & 0x3) { WrPage512Unalign (pSectorBuff); } else { WrPage512(pSectorBuff); // Write page/sector data. } NF_MECC_Lock(); // Write the SectorInfo data to the media. // Spare area[7:0] if(pSectorInfoBuff) { WrPageInfo((PBYTE)pSectorInfoBuff); pSectorInfoBuff++; } else // Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data) { BYTE TempInfo[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; WrPageInfo(TempInfo); } // Write the SectorInfo data to the media. // Spare area[11:8] // Get the ECC data from status register. MECC = NF_RDMECC0(); // Now, Write the ECC data to Spare area[11:8] NF_WRDATA_BYTE((UCHAR)((MECC ) & 0xff)); // Spare area offset 8 NF_WRDATA_BYTE((UCHAR)((MECC >> 8) & 0xff)); // Spare area offset 9 NF_WRDATA_BYTE((UCHAR)((MECC >> 16) & 0xff)); // Spare area offset 10 NF_WRDATA_BYTE((UCHAR)((MECC >> 24) & 0xff)); // Spare area offset 11 NF_CLEAR_RB(); NF_CMD(CMD_WRITE2); // Send write confirm command. NF_DETECT_RB(); do { NF_CMD(CMD_STATUS); Status = NF_RDDATA_BYTE(); // Read command status. }while(!(Status & STATUS_READY)); if (Status & STATUS_ERROR) { NF_nFCE_H(); // Deselect the flash chip. return(FALSE); } pSectorBuff += NAND_SECTOR_SIZE; } ++SectorAddr; } NF_nFCE_H(); // Deselect the flash chip. return(TRUE); }

这部分就不需要修改了，上面的代码是处理SLC部分的

4、FMD_LB_EraseBlock() 擦出块

BOOL FMD_LB_EraseBlock(BLOCK_ID blockID) { BOOL bRet = TRUE; DWORD dwPageID = blockID << LB_NAND_LOG_2_PAGES_PER_BLOCK; #if (NAND_DEBUG) RETAILMSG(1, (TEXT("FMD_LB_EraseBlock 0x%x \n"), blockID)); #endif // Enable the chip NF_nFCE_L(); // Select the flash chip. NF_CLEAR_RB(); NF_MSGLENGTH_512(); // Issue command NF_CMD(CMD_ERASE); // Set up address NF_ADDR((dwPageID) & 0xff); NF_ADDR((dwPageID >> 8) & 0xff); #if LB_NEED_EXT_ADDR NF_ADDR((dwPageID >> 16) & 0xff); #endif // Complete erase operation NF_CMD(CMD_ERASE2); // Wait for ready bit NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("LB######## Error Erasing block (Illigar Access) %d!\n"), blockID)); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status NF_CMD(CMD_STATUS); if( NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("LB######## Error Erasing block %d!\n"), blockID)); bRet = FALSE; } } NF_nFCE_H(); // Select the flash chip. return bRet; }

上述是飞凌的源码，这里我们需要稍作修改。

在使能片选 NF_nFCE_L(); 之前，我们需要使能一些中断：

g_pNFConReg->NFCONT |= (1<<10); // Enable illegal access interrupt control g_pNFConReg->NFCONT |= (1<<9); // Enable RnB interrupt

擦除操作处理完之后，在 NF_nFCE_H(); 之前，需要关闭前面使能的中断：

g_pNFConReg->NFCONT &= ~(1<<10); // Disable illegal access interrupt control g_pNFConReg->NFCONT &= ~(1<<9); // Disable RnB interrupt

5、FMD_SB_EraseBlock()

BOOL FMD_SB_EraseBlock(BLOCK_ID blockID) { BOOL bRet = TRUE; DWORD dwPageID = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK; // Enable the chip NF_nFCE_L(); // Select the flash chip. // Issue command NF_CMD(CMD_ERASE); // Set up address NF_ADDR((dwPageID) & 0xff); NF_ADDR((dwPageID >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((dwPageID >> 16) & 0xff); #endif NF_CLEAR_RB(); // Complete erase operation NF_CMD(CMD_ERASE2); // Wait for ready bit NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("SB######## Error Erasing block (Illigar Access) %d!\n"), blockID)); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status NF_CMD(CMD_STATUS); if( NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("SB######## Error Erasing block %d!\n"), blockID)); bRet = FALSE; } } NF_nFCE_H(); // Select the flash chip. return bRet; }

SLC擦除块操作，这里不需要修改

6、FMD_LB_GetBlockStatus() MLC获取块的状态

DWORD FMD_LB_GetBlockStatus(BLOCK_ID blockID) { BLOCK_ID blockID_bad = blockID + 1; SECTOR_ADDR sectorAddr = (blockID_bad << LB_NAND_LOG_2_PAGES_PER_BLOCK) - 1; SectorInfo SI; DWORD dwResult = 0; //RETAILMSG(1, (TEXT("FMD_LB_GetBlockStatus (0x%x)0x%x \n"), blockID, sectorAddr)); if(!FMD_LB_ReadSector(sectorAddr, NULL, &SI, 1)) { return BLOCK_STATUS_UNKNOWN; } if(!(SI.bOEMReserved & OEM_BLOCK_READONLY)) { dwResult |= BLOCK_STATUS_READONLY; } if (!(SI.bOEMReserved & OEM_BLOCK_RESERVED)) { dwResult |= BLOCK_STATUS_RESERVED; } if(SI.bBadBlock != 0xFF) { dwResult |= BLOCK_STATUS_BAD; } return dwResult; }

7、FMD_SB_GetBlockStatus() SLC读取块状态

DWORD FMD_SB_GetBlockStatus(BLOCK_ID blockID) { SECTOR_ADDR sectorAddr = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK; SectorInfo SI; DWORD dwResult = 0; //RETAILMSG(1, (TEXT("FMD_SB_GetBlockStatus (0x%x)0x%x \n"), blockID, sectorAddr)); if(!FMD_SB_ReadSector(sectorAddr, NULL, &SI, 1)) { return BLOCK_STATUS_UNKNOWN; } if(!(SI.bOEMReserved & OEM_BLOCK_READONLY)) { dwResult |= BLOCK_STATUS_READONLY; } if(SI.bBadBlock != 0xFF) { dwResult |= BLOCK_STATUS_BAD; } return dwResult; }

8、FMD_LB_SetBlockStatus()、FMD_SB_SetBlockStatus() 设置块的状态

BOOL FMD_LB_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus) { BYTE bStatus = 0; if(dwStatus & BLOCK_STATUS_BAD) { if(!LB_MarkBlockBad (blockID)) { return FALSE; } } // We don't currently support setting a block to read-only, so fail if request is // for read-only and block is not currently read-only. if(dwStatus & BLOCK_STATUS_READONLY) { if(!(FMD_LB_GetBlockStatus(blockID) & BLOCK_STATUS_READONLY)) { return FALSE; } } return TRUE; } BOOL FMD_SB_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus) { SECTOR_ADDR sectorAddr = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK; BYTE bStatus = 0; //RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbsetblock \n"))); if(dwStatus & BLOCK_STATUS_BAD) { if(!SB_MarkBlockBad (blockID)) { return FALSE; } } // We don't currently support setting a block to read-only, so fail if request is // for read-only and block is not currently read-only. if(dwStatus & BLOCK_STATUS_READONLY) { if(!(FMD_SB_GetBlockStatus(blockID) & BLOCK_STATUS_READONLY)) { return FALSE; } } return TRUE; }

9、LB_MarkBlockBad()、SB_MarkBlockBad() 标记坏块

BOOL LB_MarkBlockBad(BLOCK_ID blockID) { BLOCK_ID blockID_bad = blockID + 1; DWORD dwStartPage = (blockID_bad << LB_NAND_LOG_2_PAGES_PER_BLOCK) - 1; BOOL bRet = TRUE; // RETAILMSG(1, (TEXT("LB_MarkBlockBad 0x%x \n"), dwStartPage)); // Enable chip NF_nFCE_L(); NF_CLEAR_RB(); NF_MSGLENGTH_512(); // Issue command // We are dealing with spare area NF_CMD(CMD_WRITE); // Set up address NF_ADDR((4096+LB_POS_BADBLOCK)&0xff); // gjl 2048 NF_ADDR(((4096+LB_POS_BADBLOCK)>>8)&0xff); // gjl 2048 NF_ADDR((dwStartPage) & 0xff); NF_ADDR((dwStartPage >> 8) & 0xff); #if LB_NEED_EXT_ADDR NF_ADDR((dwStartPage >> 16) & 0xff); #endif NF_WRDATA_BYTE(BADBLOCKMARK); // Copmlete the write NF_CMD(CMD_WRITE2); // Wait for RB NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n"))); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status of program NF_CMD(CMD_STATUS); if( NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n"))); bRet = FALSE; } } // Disable chip select NF_nFCE_H(); return bRet; } BOOL SB_MarkBlockBad(BLOCK_ID blockID) { DWORD dwStartPage = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK; BOOL bRet = TRUE; //RETAILMSG(1, (TEXT("SB_MarkBlockBad 0x%x \n"), dwStartPage)); // Enable chip NF_nFCE_L(); NF_CLEAR_RB(); // Issue command // We are dealing with spare area NF_CMD(CMD_READ2); NF_CMD(CMD_WRITE); // Set up address NF_ADDR(SB_POS_BADBLOCK); NF_ADDR((dwStartPage) & 0xff); NF_ADDR((dwStartPage >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((dwStartPage >> 16) & 0xff); #endif NF_WRDATA_BYTE(BADBLOCKMARK); // Copmlete the write NF_CMD(CMD_WRITE2); // Wait for RB NF_DETECT_RB(); // Wait tR(max 12us) if ( NF_RDSTAT & STATUS_ILLACC ) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n"))); g_pNFConReg->NFSTAT = STATUS_ILLACC; // Write 1 to clear. bRet = FALSE; } else { // Check the status of program NF_CMD(CMD_STATUS); if( NF_RDDATA_BYTE() & STATUS_ERROR) { RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n"))); bRet = FALSE; } } // Disable chip select NF_nFCE_H(); return bRet; }

10、LB_IsBlockBad()、SB_IsBlockBad() 判断是否为坏块

BOOL LB_IsBlockBad(BLOCK_ID blockID) { BLOCK_ID blockID_bad = blockID + 1; DWORD dwPageID = (blockID_bad << LB_NAND_LOG_2_PAGES_PER_BLOCK) - 1; BOOL bRet = FALSE; BYTE wFlag; // Enable the chip NF_nFCE_L(); NF_CLEAR_RB(); NF_MSGLENGTH_512(); // Issue the command NF_CMD(CMD_READ); // Set up address NF_ADDR((4096+LB_POS_BADBLOCK)&0xff); //gjl 2048 NF_ADDR(((4096+LB_POS_BADBLOCK)>>8)&0xff); // gjl 2048 NF_ADDR((dwPageID) & 0xff); NF_ADDR((dwPageID >> 8) & 0xff); #if LB_NEED_EXT_ADDR NF_ADDR((dwPageID >> 16) & 0xff); #endif NF_CMD(CMD_READ3); // Wait for Ready bit NF_DETECT_RB(); // Wait tR(max 12us) // Now get the byte we want wFlag = (BYTE)(NF_RDDATA_BYTE()&0xff); if(wFlag != 0xff) { RETAILMSG(1, (TEXT("FMDLB: IsBlockBad - Page #: 0x%x \n"), dwPageID)); bRet = TRUE; } // Disable the chip NF_nFCE_H(); return bRet; } BOOL SB_IsBlockBad(BLOCK_ID blockID) { DWORD dwPageID = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK; BOOL bRet = FALSE; BYTE wFlag; //RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbisblockbad \n"))); // Enable the chip NF_nFCE_L(); NF_CLEAR_RB(); // Issue the command NF_CMD(CMD_READ2); // Set up address NF_ADDR(SB_POS_BADBLOCK); NF_ADDR((dwPageID) & 0xff); NF_ADDR((dwPageID >> 8) & 0xff); #if SB_NEED_EXT_ADDR NF_ADDR((dwPageID >> 16) & 0xff); #endif // Wait for Ready bit NF_DETECT_RB(); // Wait tR(max 12us) // Now get the byte we want wFlag = (BYTE) NF_RDDATA_BYTE(); if(wFlag != 0xff) { RETAILMSG(1, (TEXT("FMDSB: IsBlockBad - Page #: 0x%x \n"), dwPageID)); bRet = TRUE; } // Disable the chip NF_nFCE_H(); return bRet; }

时间比较仓促，这个Nandflash移植系列的就到这里结束了。

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